基于耦合本振阵列的旁瓣抑制技术研究

以耦合振荡器阵列作为本振阵列,提出具有旁瓣抑制的接收波束天线阵列扩展结构,推导了其接收波束形成的方向图函数,分析了该接收波束旁瓣抑制技术的可行性,并通过计算机仿真验证了旁瓣抑制技术的理论分析结果,为耦合振荡器阵列应用于天线接收的干扰抑制技术提供了理论基础。     

一种集成新型相位切换预分频器和高品质因素压控振荡器5 GHz CMOS频率综合器

本文实现了一种集成新型相位切换预分频器和高品质因素压控振荡器的锁相环频率综合器。该频率综合器在考虑噪声性能的基础上进行系统参数设计。预分频器采用了一种不易受工艺偏差影响的相位切换方式。对压控振荡器的电感开关电容和压控电容的品质因素进行了优化。与其他文献相比,该频率综合器使用相近的功耗取得更好的噪声性能。本文提出的频率综合器采用SMIC0.13微米工艺流片,芯片面积为11502500 μm²。当锁定在5 GHz时,其功耗在1.2V电源电压供电时为15mA。此时,1MHz频偏处相位噪声为-122.45dBc/Hz。     

Surface-type humidity sensor based on cellulose-PEPC for telemetry systems

In this study, Au/Cellulose-PEPC/Au surface-type humidity sensors were fabricated by drop-casting cellulose and poly-N-epoxypropylcarbazole (PEPC) blend thin films. Blend of 2 wt.% of each cellulose and PEPC in benzol were used for the deposition of humidity sensing films. Blend films were deposited on glass substrates with preliminary deposited surface-type gold electrodes. Films of different thicknesses of cellulose and PEPC composite were deposited by drop-casting technique. A change in electrical resistance and capacitance of the fabricated devices were observed with the increase of relative humidity in the range of 0−95% RH. It was observed that the capacitances of the sensors increase, while their resistances decrease with increasing of the relative humidity. The sensors were connected to op-amp square wave oscillators. It was observed that with increase of relative humidity, the oscillator’s frequencies were also increased in the range of 4.2−12.0 kHz for 65 μm thick film sample and 4.1−9.0 kHz for 88 μm thick film sample and for 210 μm sample, the oscillator frequency changed in the range of 4.2−9.0 kHz. Effects of film thickness on the oscillator’s frequency with respect to humidity were also investigated. This polymer humidity sensor controlled oscillator can be used for short-range and long-range remote systems at environmental monitoring and assessment of the humidity level.     

A 1.0 V differential VCO in 0.13 μm CMOS technology

A differential complementary LC voltage controlled oscillator(VCO) with high Q on-chip inductor is presented.The parallel resonator of the VCO consists of inversion-mode MOS(I-MOS) capacitors and an on-chip inductor.The resonator Q factor is mainly limited by the on-chip inductor.It is optimized by designing a single turn inductor that has a simulated Q factor of about 35 at 6 GHz.The proposed VCO is implemented in the SMIC 0.13μm 1P8M MMRF CMOS process,and the chip area is 1.0×0.8 mm~2.The free-running frequency is from 5.73 to 6.35 GHz.When oscillating at 6.35 GHz,the current consumption is 2.55 mA from a supply voltage of 1.0 V and the measured phase noise at 1 MHz offset is -120.14 dBc/Hz.The figure of merit of the proposed VCO is -192.13 dBc/Hz.     

Digitally controlled oscillator design with a variable capacitance XOR gate

A digitally controlled oscillator (DCO) using a three-transistor XOR gate as the variable load has been presented. A delay cell using an inverter and a three-transistor XOR gate as the variable capacitance is also proposed. Three-, five- and seven-stage DCO circuits have been designed using the proposed delay cell. The output frequency is controlled digitally with bits applied to the delay cells. The three-bit DCO shows output frequency and power consumption variation in the range of 3.2486-4.0267 GHz and 0.6121-0.3901 mW, respectively, with a change in the control word 111-000. The five-bit DCO achieves frequency and power of 1.8553-2.3506 GHz and 1.0202-0.6501 mW, respectively, with a change in the control word 11111-00000. Moreover, the seven-bit DCO shows a frequency and power consumption variation of 1.3239-1.6817 GHz and 1.4282-0.9102 mW, respectively, with a varying control word 1111111-0000000. The power consumption and output frequency of the proposed circuits have been compared with earlier reported circuits and the present approaches show significant improvements.     

一种用于开关电源中的双极型高频振荡器

文章提出了一种基于2μm双极型工艺设计、应用于DC/DC开关电源中的高频振荡电路.该模块产生时钟信号,该时钟信号的频率可以随着负载和电源电压的变化而变化.我们用Cadence Spectre仿真工具对电路的工作状态进行仿真,结果表明该电路在宽电源输入和高、低温范围内都具有良好的性能.本振荡电路不但功能良好,而且结构简单...     

一种基于CMOS工艺的高精度片内振荡器的设计

采用恒流源充放电及温度补偿技术设计了一款结构简单、易于集成的片内振荡器。该模块的核心为利用带隙基准电流源产生一路零温度系数电流,并用该电流源对电容进行充放电;设置比较器的高低阈值电压的差值为负温度系数与电容的正温度系数相互补偿,尽可能减弱温度对振荡周期的影响,产生高稳定且占空比可调的矩形波。采用华虹NEC0.35μmCZ6H工艺设计,经CadenceSpectre软件仿真表明标准状况下该模块振荡频率为6.321MHz,在-20到100℃的温度区间内其温度系数仅为42ppm/℃。     

D类音频功放中扩频振荡器的设计

设计了一种用于D类音频功放的新型扩频振荡器。采用电流控制模式,利用伪随机数字频率调制,使谐波能量更加分散,频谱幅度更小,从而减小D类音频功放的EMI辐射。基于UMC0.6μm30V BCD工艺,对提出的扩频振荡器电路进行仿真验证。结果显示,扩频频率点具有良好的均匀性和随机性,并且D类音频功放的EMI主峰值幅度下降了4dB,其余EMI的峰值幅度下降了大约10dB,扩频降低电磁干扰(EMI)辐射的效果显著。     

近场脉冲型地震作用下结构响应预测研究

选择典型的具有速度脉冲的近场地震动记录组成地震记录库,建立了3个处于不同周期范围的墩柱结构模型,利用非线性动力分析考察了采用非弹性位移响应谱值作为近场脉冲型地震动的强度参数来预测结构地震响应的有效性,并探讨了非线性振子的参数选取对利用非弹性位移响应谱值预测结构地震响应的影响;以模型的静Pushover分析得到的屈服位移...     

缓冲器输出端相位噪声模型分析

相位噪声是振荡器的重要性能指标。近年来,研究人员在振荡器相位噪声表征方面已经做了大量的工作,在这些过程中开发出了很多不同类型的振荡器相位噪声模型。但是在这些模型中,都没有分析缓冲器噪声对振荡器相位噪声的影响。而在研究课题中,首先要对缓冲器噪声的功率谱密度函数进行数学建模,并易于将这个模型嵌入到相位噪声的非线性扰动分析模型,这样就得到了含有缓冲器噪声的振荡器相位噪声模型。